Field of the Invention
The invention relates to a time signal generating technique of a power converter, more specifically, to a time signal generating circuit having an on-time that is regulated correspondingly to an input voltage and a time signal generating method using the same.
Description of Related Art
Generally, to generate successfully an expected output voltage of a DC to DC converter, an input voltage of the DC to DC converter needs being higher, to certain extent, than the expected output voltage. In a condition that the input voltage is provided by a battery, the input voltage will decrease gradually over time so that the output voltage generated by the DC to DC converter could not reach the expected and rated voltage value.
FIG. 1 is a schematic diagram of a circuit architecture of a conventional DC to DC converter. Referring to FIG. 1, when a pulse width modulation (PWM) is at constant on-time (COT), a comparing unit 10 of the DC to DC converter 1 compares a feedback voltage VFB, which relates to the output voltage VOUT, with a reference voltage VREF. In case the comparing unit 10 attains a result that the feedback voltage VFB is lower than the reference voltage VREF, the result is represented as the output voltage VOUT generated by the DC to DC converter 1 becomes obviously low. Therefore, a pulse width modulation unit 12 sends a fixed on-time pulse width modulation signal PWM to an output stage 14 so that a capacitor C is performed charging, and the phenomenon that the output voltage VOUT couldn't reach the rated voltage value increases.
FIG. 2 is a timing diagram of the input voltage, the output voltage and the pulse width modulation signal of the conventional DC to DC converter. Referring to FIG. 2, every on-time Ton of the pulse width modulation signal PWM is accompanied and followed by an off-time Toff. In addition, a cycle time of the pulse width modulation signal PWM is defined as an on-time Ton and an off-time Toff Before the time TA, the value of the input voltage VIN is stable and fixed, the on-time Ton and the off-time Toff all have a fixed value and appear repeatedly. In the situation that the cycle time of the pulse width modulation signal PWM doesn't change, the input voltage VIN starts to decrease after the time TA so that the on-time Ton increases and the off-time Toff decreases correspondingly. Hence, the output voltage VOUT is maintained at the rated voltage and the output voltage VOUT couldn't be decreased. When the input voltage VIN decreases to a certain extent (the default voltage VTH) after the time TB, the cycle time of the pulse width modulation signal PWM is maintained constant and the off-time Toff of the cycle time couldn't further decrease so that the on-time Ton is also maintained at a fixed value and a longer charging time couldn't be provided. As a result, the output voltage VOUT decreases correspondingly to the decreasing of the input voltage VIN, more importantly, the voltage conversion efficiency of the DC to DC converter 1 (as shown in FIG. 1) is affected.
FIG. 3 is a schematic diagram of a transient response of the conventional DC to DC converter. Referring to FIG. 3, a loading condition occurs at the time TA (for example, load current ILoad), the inductive current IL and the output voltage VOUT oscillate according to the loading. After the time TB, the input voltage VIN is smaller than the default voltage VTH (as shown in FIG. 2), the transient response of the inductive current IL and the output voltage VOUT oscillates much more intensely.